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Let’s first build a diagram of this controller. But if we want to control the motor at different speeds, then we need to build a controller that will adjust the magnitude of the applied voltage. When the applied voltage is constant, the motor turns at a constant speed due to the proportional relationship between voltage and speed. Here, we have a DC voltage source that provides a constant voltage to the three-phase inverter, which converts the DC power to three-phase currents to energize different coil pairs. We also talked about how motion is generated in the BLDC motor through the six-step commutation or trapezoidal control, where the correct phases are commutated every 60 degrees for continuous rotation of the motor. In the previous video, we introduced a BLDC motor that has three coil windings in the stator and a single pole pair in the rotor. We’ll explore the behavior of different signals of this control algorithm and also discuss the concept of inductive flyback. The FPGA and processor communicate via AXI interface.In this video, we’ll discuss what kind of control algorithm you need to control a BLDC motor. The fast current controller is running on the FPGA and the slow velocity controller on the processor. The structure of the partitioned SoC model is based on the partitioning scheme shown below. The closed-loop velocity control also uses a PI controller, similar to the current controller. After determining the encoder offset, the velocity controller is calibrated and can be switched into closed-loop velocity control. Then the controller commands and holds a zero position to identify the encoder offset. In the calibration mode, the Mode_Scheduler spins the motor using an open-loop velocity controller to identify the zero index of the shaft encoder. The Velocity Control subsystem takes external commands to set the mode of the controller as either calibrating or closed-loop velocity tracking. A Proportional-Integral (PI) controller uses the DC signals to drive PWM switching signals to the power MOSFETs driving the PMSM. The current controller uses consecutive Clarke and Park transforms to convert the AC current and voltage waveform into DC signals. The Current Control subsystem takes a command current value from the Calibration and Velocity Control subsystem. The Controller is split into two subsystems, an inner Current Control loop and outer Velocity and Calibration Control loop. The Controller subsystem contains the closed-loop FOC and the open-loop calibration controllers. The model parameters of the motor, load, and sensors are based on the AD-FMCMOTCON2-EBZ Evaluation Board from Analog Devices®. The Plant subsystem models a PMSM with load with simulated measurements from a motor shaft encoder and current sensors. The top-level structure of the behavioral model is shown below. A comparison of the simulation results between the behavioral and SoC models shows the expected behavior of the controller is maintained.
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The second model shows how the open-loop calibration controller, closed-loop velocity controller, and closed-loop current controller can be partitioned into an SoC device using SoC Blockset. The first model in this example is used for behavioral simulation of a closed-loop FOC with an open-loop calibration controller for a PMSM. By partitioning the current and velocity controllers onto the FPGA and processor cores, respectively, both control loops in the FOC can meet the above requirements. In contrast, the velocity control can run at lower rates, typically milliseconds, but must react to external events, such as commanded velocity updates. In an FOC running in closed-loop, the current control loop needs to run at a high rate, typically microseconds.